There are proposed magnetic memory devices (semiconductor integrated circuit devices) in which a transistor and a magnetoresistive effect element are integrated on a semiconductor substrate.
When the magnetoresistive effect element is miniaturized, a shift field adversely increases. To reduce the shift field, Mst (which corresponds to magnetization per unit area) should be decreased. However, generally, when Mst is decreased, the MR ratio is decreased, too.
Therefore, magnetic memory devices comprising a magnetoresistive effect element with both low Mst and high MR ratio are demanded.